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A 25-GS/s 4-bit Single-core Flash ADC in 28 nm FDSOI CMOS.

Yulang FengYuxuan TangQingjun FanJinghong Chen
Published in: APCCAS (2018)
Keyphrases
  • analog to digital converter
  • high speed
  • low cost
  • neural network
  • data sets
  • genetic algorithm
  • nm technology
  • digital images
  • design considerations
  • cmos technology