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A VLSI neural processor for image data compression using self-organization networks.

Wai-Chi FangBing J. SheuOscal T.-C. ChenJoongho Choi
Published in: IEEE Trans. Neural Networks (1992)
Keyphrases
  • image data compression
  • high speed
  • spiking neural networks
  • image compression
  • single chip
  • block coding
  • gate array
  • signal processing
  • network structure
  • unsupervised learning
  • low complexity
  • chip design