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A 14-bit 130-MHz CMOS current-steering DAC with adjustable INL.

Tao ChenPeter GeensGeert Van der PlasWim DehaeneGeorges G. E. Gielen
Published in: ESSCIRC (2004)
Keyphrases
  • high speed
  • low voltage
  • random access memory
  • data mining
  • low cost
  • power consumption
  • real time
  • genetic algorithm
  • learning algorithm
  • information systems
  • digital images
  • vlsi circuits