Fully Automated Hardware-Driven Clock-Gating Architecture with Complete Clock Coverage for 5nm Exynos Mobile SoC.
Jae-Gon LeeHoyeon JeonYounsik ChoiAhchan KimPublished in: ISSCC (2022)
Keyphrases
- fully automated
- clock gating
- power consumption
- fpga device
- low power
- power reduction
- hardware implementation
- fully automatic
- power management
- power dissipation
- real time
- semi automated
- hardware and software
- cmos technology
- labor intensive
- energy efficiency
- field programmable gate array
- hardware architecture
- embedded systems
- completely automated
- power saving
- hardware software co design
- low cost
- multithreading
- energy saving
- high speed
- hardware software
- mobile networks
- computing systems
- data flow