A low-jitter 1.9-V CMOS PLL for UltraSPARC microprocessor applications.

Hee-Tae Ahn David J. Allstot

Published in: IEEE J. Solid State Circuits (2000)

Keyphrases

high speed
circuit design
low cost
power consumption
silicon on insulator
database
low power
design methodology
data sets
operating system
hardware and software
packet loss
high levels
vlsi circuits