Low Power Shift and Add Multiplier Design

C. N. Marimuthu P. Thangaraj Aswathy Ramesan

Published in: CoRR (2010)

Keyphrases

low power
single chip
low cost
power consumption
vlsi architecture
low power consumption
logic circuits
high speed
digital signal processing
gate array
cmos technology
ultra low power
power dissipation
power reduction
real time
design process