A 5 pJ/pulse at 1-Gpps Pulsed Transmitter Based on Asynchronous Logic Master-Slave PLL Synthesis.
Marco CrepaldiGian Nicola AngotziAntonio MavigliaFrancesco DiotaleviLuca BerdondiniPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2018)
Keyphrases
- master slave
- shift register
- asynchronous circuits
- delay insensitive
- logic synthesis
- logic programming
- multi valued
- robotic arm
- functional programs
- classical logic
- program synthesis
- modal logic
- random number generator
- laparoscopic surgery
- power supply
- logic programs
- contact force
- discussion forums
- automated reasoning
- texture synthesis
- communication systems
- programming language