FPGA Acceleration of Irregular Iterative Computations using Criticality-Aware Dataflow Optimizations (Abstract Only).
SiddharthaNachiket KaprePublished in: FPGA (2015)
Keyphrases
- real time
- field programmable gate array
- parallel computing
- hardware implementation
- high level
- data flow
- higher level
- irregularly shaped
- signal processing
- high speed
- database machine
- power reduction
- systolic array
- image processing
- low cost
- low level
- design methodology
- software engineering
- hardware design
- iterative methods
- parallel hardware