Scalable load balancing congestion-aware Network-on-Chip router architecture.
Chifeng WangWen-Hsiang HuNader BagherzadehPublished in: J. Comput. Syst. Sci. (2013)
Keyphrases
- load balancing
- network on chip
- multi processor
- routing algorithm
- network simulator
- distributed systems
- data transfer
- fault tolerant
- fault tolerance
- mobile agents
- peer to peer
- interconnection networks
- grid computing
- single processor
- shortest path
- data transmission
- wireless sensor networks
- parallel processing
- ad hoc networks
- real time
- power dissipation
- low cost