Formal verification of pulse-mode asynchronous circuits.
Xiaohua KongRadu NegulescuPublished in: ASP-DAC (2001)
Keyphrases
- asynchronous circuits
- formal verification
- model checking
- temporal logic
- process algebra
- model checker
- automated verification
- delay insensitive
- symbolic model checking
- bounded model checking
- formal specification
- program slicing
- linear temporal logic
- concurrent systems
- formal methods
- model based diagnosis
- ultra wideband
- belief revision
- first order logic
- orders of magnitude
- domain specific
- expert systems