Congestion and track usage improvement of large FPGAs using metro-on-FPGA methodology.
Mehdi AlipourMohammad Haji Seyed JavadiAli JahanianPublished in: ACM Great Lakes Symposium on VLSI (2011)
Keyphrases
- field programmable gate array
- hardware implementation
- fpga implementation
- embedded systems
- hardware design
- reconfigurable hardware
- hardware software co design
- parallel computing
- digital signal processing
- fpga technology
- design methodology
- real time
- software implementation
- hardware software
- low cost
- verilog hdl
- image processing algorithms
- efficient implementation
- signal processing
- high speed
- significant improvement
- image processing
- neural network