A 0.2 V-1.8 V 8T SRAM with Bit-interleaving Capability.

Hui Zhao Shiquan Fan Leicheng Chen Yan Song Li Geng

Published in: IEICE Electron. Express (2014)

Keyphrases

random access memory
power consumption
learning algorithm
data transmission
design considerations
bit vector
data sets
data mining
e learning
website
high speed
bit vectors