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Fortran High-Level Synthesis: Reducing the barriers to accelerating HPC codes on FPGAs.
Gabriel Rodriguez-Canal
Nick Brown
Tim Dykes
Jessica R. Jones
Utz-Uwe Haus
Published in:
CoRR (2023)
Keyphrases
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high level synthesis
scientific computing
high performance computing
parallel architecture
error correction
hardware software
fault tolerance
hardware implementation
distributed memory
parallel computation
design space exploration
image processing
pattern recognition
pairwise
load balancing
parallel architectures