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A Low-Power High-Speed Dynamic Comparator With a Transconductance-Enhanced Latching Stage.
Yao Wang
Mengmeng Yao
Benqing Guo
Zhaolei Wu
Wenbing Fan
Juin Jei Liou
Published in:
IEEE Access (2019)
Keyphrases
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low power
high speed
cmos technology
power consumption
low cost
single chip
high power
low power consumption
vlsi architecture
wireless transmission
frame rate
digital signal processing
mixed signal
image sensor
real time
logic circuits
vlsi circuits
gate array
power dissipation
signal processor