Formal verification methodology for real-time Field Programmable Gate Array.
Shaista JabeenSudarshan K. SrinivasanSana ShujaPublished in: IET Comput. Digit. Tech. (2017)
Keyphrases
- formal verification
- real time
- field programmable gate array
- fpga device
- application specific integrated circuits
- model checking
- hardware implementation
- low power consumption
- fpga technology
- fpga implementation
- general purpose processors
- pipelined architecture
- model checker
- embedded systems
- automated verification
- symbolic model checking
- image processing algorithms
- bounded model checking
- hardware software co design
- programmable logic
- general purpose
- hardware design
- high speed
- parallel computing
- digital signal processors
- software implementation
- low cost
- host computer
- computing systems
- low power
- hardware architecture
- power consumption
- computer vision