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A 9-Bit 10-MHz 28-µW SAR ADC Using Tapered Bit Periods and a Partially Interdigitated DAC.
Devon Janke
Andrew Monk
Eric Swindlehurst
Kent D. Layton
Shiuh-Hua Wood Chiang
Published in:
IEEE Trans. Circuits Syst. II Express Briefs (2019)
Keyphrases
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bit vector
motion estimation
bit vectors
magnetic tape
data sets
neural network
high speed
fourier transform
sar images
synthetic aperture radar
random number generator
bit parallel
analog to digital converter