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Two-level Logic Synthesis for Low Power Based on New Model of Power Dissipation.

Ireneusz BrzozowskiAndrzej Kos
Published in: DDECS (2007)
Keyphrases
  • low power
  • power consumption
  • logic circuits
  • low cost
  • high speed
  • power dissipation
  • real time
  • digital signal processing
  • knowledge acquisition
  • network structure
  • finite state machines
  • cmos technology