Compact low-power calibration mini-DACs for neural arrays with programmable weights.
Bernabé Linares-BarrancoTeresa Serrano-GotarredonaRafael Serrano-GotarredonaPublished in: IEEE Trans. Neural Networks (2003)
Keyphrases
- low power
- low cost
- single chip
- signal processor
- high speed
- power consumption
- network architecture
- vlsi circuits
- high power
- digital signal processing
- vlsi architecture
- wireless transmission
- low power consumption
- logic circuits
- real time
- general purpose
- gate array
- mixed signal
- cmos technology
- focal plane
- synaptic weights
- image sensor
- multi view