Just-in-Time Instruction Set Extension - Feasibility and Limitations for an FPGA-Based Reconfigurable ASIP Architecture.
Mariusz GradChristian PlesslPublished in: IPDPS Workshops (2011)
Keyphrases
- instruction set
- application specific
- hardware implementation
- dedicated hardware
- embedded systems
- general purpose
- floating point
- field programmable gate array
- computer architecture
- level parallelism
- low cost
- smart camera
- memory subsystem
- ibm power processor
- hardware architecture
- real time
- instruction set architecture
- efficient implementation
- fixed point
- artificial intelligence