Computation Reduction Techniques for Vector Median Filtering and their Hardware Implementation.
Ozgur TasdizenIlker HamzaogluPublished in: DSD (2010)
Keyphrases
- hardware implementation
- pipelined architecture
- signal processing
- fpga implementation
- efficient implementation
- hardware design
- dedicated hardware
- image processing algorithms
- software implementation
- hardware architecture
- field programmable gate array
- real time
- efficient computation
- parallel architecture
- pipeline architecture
- parallel computation
- low cost
- memory management
- image processing
- fpga technology
- fine grained
- feature selection
- information systems