A new asymmetric 6T SRAM cell with a write assist technique in 65 nm CMOS technology.

Hooman Farkhani Ali Peiravi Farshad Moradi

Published in: Microelectron. J. (2014)

Keyphrases

cmos technology
low power
power consumption
low voltage
spl times
parallel processing
low cost
high speed
silicon on insulator
image sensor
power dissipation
mixed signal
embedded dram
random access memory
power management