Serial and Parallel FPGA-based Variable Block Size Motion Estimation Processors.

Brian M. H. Li Philip Heng Wai Leong

Published in: J. Signal Process. Syst. (2008)

Keyphrases

parallel architecture
parallel processing
variable block size motion estimation
shared memory
hardware implementation
distributed memory
parallel computing
parallel algorithm
parallel implementation
efficient implementation
filter bank
image coding
transform domain
parallel machines