A low-power reference buffer with high PSRR and low crosstalk for time-interleaved ADCs.

Hyeonho Song Jintae Kim Minjae Lee

Published in: IEICE Electron. Express (2013)

Keyphrases

low power
low power consumption
low cost
power consumption
high speed
single chip
wireless transmission
vlsi circuits
vlsi architecture
high power
logic circuits
real time
power reduction
mixed signal
energy dissipation
digital signal processing
cmos technology
gate array