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A 5GHz All-Digital PLL with shunt regulating Ring DCO in BOST for DDR5 ATE.

Kyungmin BaekKahyun KimDeog-Kyoon Jeong
Published in: ISOCC (2022)
Keyphrases
  • case study
  • high speed
  • circuit design
  • three dimensional
  • multiscale
  • digital images
  • digital technologies