Optimized low-power synchronizer design for the IEEE 802.11a standard.

Milos Krstic Alfonso Troya Koushik Maharatna Eckhard Grass

Published in: ICASSP (2) (2003)

Keyphrases

low power
low cost
power consumption
single chip
high speed
low power consumption
vlsi architecture
digital signal processing
logic circuits
gate array
power reduction
cmos technology
real time
wireless transmission
high power
ultra low power
power dissipation
image sensor
vlsi circuits
nm technology
signal processing