High speed deficit round robin ASIC in ATM/Ethernet bridge.

Guo-Ming Sung Wen-Duen Chou Wen-Shiou Ho

Published in: SMC (2014)

Keyphrases

round robin
high speed
low power
load balancing
single chip
integrated circuit
graph colouring
data acquisition
design methodology
hardware implementation
atm networks
real time
application specific
circuit design
load balance
distributed systems
hardware architecture
load distribution