Eliminating Cache-Based Timing Attacks with Instruction-Based Scheduling.
Deian StefanPablo BuirasEdward Z. YangAmit LevyDavid TereiAlejandro RussoDavid MazièresPublished in: ESORICS (2013)
Keyphrases
- memory hierarchy
- cache misses
- scheduling problem
- scheduling algorithm
- round robin
- resource consumption
- real time database systems
- resource allocation
- multimedia
- buffer management
- countermeasures
- multiprocessor systems
- data access
- main memory
- watermarking scheme
- computing power
- memory subsystem
- instruction set
- speculative execution
- query processing
- computer technology
- np hard
- parallel machines
- resource constraints
- instructional design
- prefetching