A 84dB SNDR 100kHz bandwidth low-power single op-amp third-order ΔΣ modulator consuming 140μW.

Aldo Pena-Perez Edoardo Bonizzoni Franco Maloberti

Published in: ISSCC (2011)

Keyphrases

low power
power consumption
low cost
high speed
high power
single chip
energy dissipation
digital signal processing
vlsi circuits
vlsi architecture
image sensor
wireless transmission
low power consumption
power reduction
cmos technology
mixed signal
logic circuits
real time
wireless sensor networks
image processing