A high-speed low-power SAR ADC in 40nm CMOS with combined energy-efficient techniques.
Yujia HuangQiao MengFei LiJie WuPublished in: IEICE Electron. Express (2021)
Keyphrases
- low power
- energy efficient
- high speed
- cmos technology
- power consumption
- energy efficiency
- single chip
- wireless sensor networks
- nm technology
- energy consumption
- sensor networks
- low cost
- digital signal processing
- analog to digital converter
- vlsi circuits
- data acquisition
- low power consumption
- low voltage
- routing protocol
- frame rate
- base station
- image sensor
- power management
- ultra low power
- wide dynamic range
- data transmission
- power reduction
- mixed signal
- real time
- multi hop
- end to end
- power dissipation
- energy saving
- sensor data
- routing algorithm
- sensor nodes