A high performance low power dynamic PLA with conditional evaluation scheme.

Kwang-Il Oh Lee-Sup Kim

Published in: ISCAS (2) (2004)

Keyphrases

low power
power consumption
low cost
low power consumption
high speed
signal processor
high power
vlsi circuits
image sensor
wireless transmission
vlsi architecture
logic circuits
single chip
cmos technology
gate array
power reduction
mixed signal
delay insensitive
vlsi implementation