A fast low power window-opening logic for high speed SAR ADC.

Yuxiao Lu Chaojie Fan Lu Sun Zhe Li Jianjun Zhou

Published in: IEICE Electron. Express (2014)

Keyphrases

low power
high speed
logic circuits
single chip
delay insensitive
low cost

power consumption
high power
digital signal processing
vlsi circuits
wireless transmission
sar images

image sensor
vlsi architecture
frame rate
synthetic aperture radar
real time
analog to digital converter

low power consumption
cmos technology
power reduction
wide dynamic range
image reconstruction
asynchronous circuits