A low-power multilevel-output classifier circuit.
Merih YildizShahram MinaeiIzzet Cem GöknarPublished in: ECCTD (2007)
Keyphrases
- low power
- high speed
- logic circuits
- cmos technology
- power consumption
- low cost
- power reduction
- vlsi circuits
- power dissipation
- gate array
- delay insensitive
- single chip
- mixed signal
- high power
- low power consumption
- digital signal processing
- wireless transmission
- image sensor
- circuit design
- real time
- vlsi architecture
- nm technology