A Reconfigurable Architecture and Associated Synthesis Methodology for High Speed Packet Classification.
Amit PrakashRamakrishna KotlaTanmoy MandalAdnan AzizPublished in: IWLS (2002)
Keyphrases
- high speed
- reconfigurable architecture
- decision trees
- pattern recognition
- classification accuracy
- machine learning
- feature selection
- automatic classification
- support vector
- systolic array
- classification algorithm
- text classification
- neural network
- image classification
- feature vectors
- feature extraction
- supervised learning
- machine learning algorithms
- classification models
- high speed networks
- real time
- semi supervised
- preprocessing
- classification method
- learning algorithm