Clock Gated Static Pulsed Flip-Flop (CGSPFF) in Sub 100 nm Technology.

A. S. Seyedi S. H. Rasouli Amir Amirabadi Ali Afzali-Kusha

Published in: ISVLSI (2006)

Keyphrases

power dissipation
power consumption
nm technology
flip flops
low power
high speed
cmos technology
real time
image processing
relational databases
computational intelligence