FPGA Implementation of ARM MCU with Five-stage Pipeline.

Chi-Lin Chiang Mao-Hsu Yen Che-Wei Chang Yih-Hsia Lin Yuan-Fu Ku

Published in: ICKII (2022)

Keyphrases

fpga implementation
hardware implementation
pipeline architecture
processing pipeline
image processing algorithms
neural network
machine learning
multiscale
pattern recognition
scheduling problem
co occurrence
fine grained
efficient implementation
field programmable gate array