High Speed Area Efficient Multi-resolution 2-D 9/7 filter DWT Processor.

Senthamaraikannan Raghunath Syed Mahfuzul Aziz

Published in: VLSI-SoC (2006)

Keyphrases

high speed
multiresolution
discrete wavelet transform
high speed networks
real time
database systems
image fusion
hierarchical representation
computational complexity
wavelet coefficients
frame rate
hardware implementation
wavelet decomposition
parallel architectures