FPGA implementations of HEVC Inverse DCT using high-level synthesis.
Ercan KalaliIlker HamzaogluPublished in: DASIP (2015)
Keyphrases
- high level synthesis
- parallel architecture
- software implementation
- hardware implementation
- hardware architectures
- discrete cosine transform
- transform domain
- efficient implementation
- image compression
- parallel processing
- dct coefficients
- design space exploration
- video coding standard
- general purpose processors
- video codec
- parallel implementation
- field programmable gate array
- shared memory
- spatial domain
- image processing
- high efficiency video coding
- pairwise