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The Algorithm and VLSI Architecture of High-Throughput and Highly Efficient Tensor Decomposition Engine.
Ting-Yu Tsai
Chung-An Shen
Tsung-Lin Wu
Yuan-Hao Huang
Published in:
IEEE Trans. Circuits Syst. I Regul. Pap. (2024)
Keyphrases
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highly efficient
high throughput
vlsi architecture
computational complexity
search space
k means
recognition algorithm
low latency
feature selection
three dimensional
pattern recognition
low cost