Encoder architecture with throughput over 10 Gbit/sec for quasi-cyclic LDPC codes.

Zhiyong He Sébastien Roy Paul Fortier

Published in: ISCAS (2006)

Keyphrases

ldpc codes
source coding
rate allocation
decoding algorithm
low density parity check
response time
rate distortion
message passing
bit rate
distributed video coding
error correction
video compression
channel capacity
information theoretic
wyner ziv