An Efficient VLSI Architecture for Motion Compensation of AVS HDTV Decoder.
Junhao ZhengLei DengPeng ZhangDon XiePublished in: J. Comput. Sci. Technol. (2006)
Keyphrases
- motion compensation
- vlsi architecture
- video coding standard
- low complexity
- motion estimation
- video codec
- video coding
- mode decision
- motion compensated
- video compression
- motion vectors
- high definition
- video conferencing
- motion field
- compression efficiency
- vlsi implementation
- video coder
- block matching
- intra prediction
- distributed video coding
- coding efficiency
- coding method
- bit rate
- computational complexity
- rate distortion
- low power
- error concealment
- video sequences
- image sequences
- real time
- video quality
- inter frame
- optical flow
- discrete cosine transform
- spatial domain
- computer vision
- bitstream
- block size
- video streaming
- macroblock
- temporal correlation