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IC Design of a Low-Power Analog LDPC Decoder Employing New Stopping Iteration Method.

Wen-Ta LeeSheng-Sung ChiuYu-Shi Ke
Published in: GreenCom/iThings/CPScom (2013)
Keyphrases
  • low power
  • vlsi architecture
  • low cost
  • single chip
  • signal processing
  • error correction
  • decoding algorithm
  • ldpc codes
  • mixed signal