Login / Signup

A Single-Controller-Four-Output Digital LDO With Priority-Time-Multiplexing Scheme and Clamping Loops in 65-nm CMOS.

Feng ChenYasu LuPhilip K. T. Mok
Published in: IEEE Trans. Circuits Syst. II Express Briefs (2024)
Keyphrases
  • circuit design
  • high speed
  • metal oxide semiconductor
  • real time
  • control system
  • low cost
  • noise reduction
  • low power
  • closed loop
  • control architecture
  • cmos technology
  • response time
  • signal to noise ratio