Low Power Design of the Neuroprocessor.

Abhijit S. Pandya Ankur Agarwal Gyoo-Yong Chae

Published in: Int. J. Fuzzy Log. Intell. Syst. (2004)

Keyphrases

low power
single chip
low cost
power consumption
high speed
vlsi architecture
low power consumption
digital signal processing
logic circuits
mixed signal
cmos technology
gate array
power dissipation
power reduction
high power
real time
ultra low power
image sensor
hardware and software
image processing