Architecture of a Single-Chip 50 Gb/s DP-QPSK/BPSK Transceiver With Electronic Dispersion Compensation for Coherent Optical Channels.
Diego E. CrivelliMario Rafael HuedaHugo S. CarrerMartin Del BarcoRamiro R. LopezPablo GianniJorge M. FinochiettoNorman SwensonPaul VooisOscar E. AgazziPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2014)
Keyphrases
- single chip
- software implementation
- bit error rate
- low power
- cmos image sensor
- image sensor
- communication systems
- high speed
- dynamic programming
- low cost
- computer simulation
- ofdm system
- real time
- multipath
- wireless channels
- signal processor
- channel coding
- fading channels
- wireless communication
- embedded processors
- signal to noise ratio
- modulation scheme
- analytical model
- code division multiple access
- imaging systems
- image processing algorithms
- digital images
- image sequences