A CMOS reduced-area SRAM cell.

Trudi-Heleen Joubert Evert Seevinck Monuko du Plessis

Published in: ISCAS (2000)

Keyphrases

power consumption
random access memory
low power
analog vlsi
low cost
low voltage
microscopic images
cmos technology
power supply
power management
significantly reduced
high speed
image processing
circuit design
design considerations
data transmission
cmos image sensor
nm technology