Maximizing the throughput of threshold-protected AES-GCM implementations on FPGA.
Jo VliegenOscar ReparazNele MentensPublished in: IVSW (2017)
Keyphrases
- hardware architectures
- software implementation
- response time
- hardware implementation
- threshold selection
- real time image processing
- low cost
- high speed
- real time
- signal processing
- hardware architecture
- allocation scheme
- field programmable gate array
- roc curve
- efficient implementation
- resource utilization
- fpga implementation
- digital signal
- parallel hardware
- cryptographic algorithms
- advanced encryption standard