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A leakage-aware L2 cache management technique for producer-consumer sharing in low-power chip multiprocessors.
Hyunhee Kim
Jihong Kim
Published in:
J. Parallel Distributed Comput. (2011)
Keyphrases
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low power
cache management
high speed
low cost
single chip
mixed signal
low power consumption
cmos technology
distributed object
power consumption
signal processor
ultra low power
image sensor
garbage collection
nm technology
power dissipation
query processing
cmos image sensor
digital signal processing
multithreading
prefetching
power reduction
mobile clients
shared memory
frame rate
distributed memory
low voltage
fine grained