A CMOS gate array with 600 Mb/s simultaneous bidirectional I/O circuits.
Toshiro TakahashiMakio UchidaTakahiko TakahashiRyozo YoshinoMasakazu YamamotoNobuh KitamuraPublished in: IEEE J. Solid State Circuits (1995)
Keyphrases
- gate array
- low power
- logic circuits
- cmos technology
- high speed
- delay insensitive
- power consumption
- power dissipation
- vlsi circuits
- low cost
- mixed signal
- analog vlsi
- hard disk
- input output
- circuit design
- times faster
- digital signal processing
- file system
- image sensor
- focal plane
- data storage
- floating gate
- data transfer
- low voltage
- main memory
- inter frame
- data structure
- chip design
- random access memory
- data flow
- random access
- power supply
- real time