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SiGe: C HBT Featuring an Implanted Collector in a 55-nm CMOS Node.
Alexis Gauthier
J. Borrel
Pascal Chevalier
Grégory Avenier
A. Montagne
M. Juhel
R. Duru
L.-R. Clément
C. Borowiak
Michel Buczko
C. Gaquière
Published in:
BCICTS (2018)
Keyphrases
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cmos technology
high speed
mixed signal
silicon on insulator
power consumption
nm technology
low cost
metal oxide semiconductor
graph structure
vlsi circuits
power supply
analog vlsi
thin film
low power
tree structure
image sequences
neural network
dual channel