Gate elimination: Circuit size lower bounds and #SAT upper bounds.
Alexander GolovnevAlexander S. KulikovAlexander V. SmalSuguru TamakiPublished in: Theor. Comput. Sci. (2018)
Keyphrases
- upper bound
- lower bound
- lower and upper bounds
- max sat
- upper and lower bounds
- branch and bound
- branch and bound algorithm
- worst case
- search algorithm
- constant factor
- high speed
- np hard
- randomly generated problems
- linear functions
- vc dimension
- column generation
- cmos technology
- multiple input
- efficiently computable
- satisfiability problem
- computational complexity
- linear programming relaxation
- sat problem
- objective function
- optimal cost
- knapsack problem
- optimal solution